Tag Archives: TM-650

IPC Standards Committee Report – Assembly, Product Assurance, Process Control, Test, Cleaning/Coating, Reliability

This is part of a series of updates from IPC standards committee meetings at IPC Midwest. Assembly and Joining The 5-21f Ball Grid Array Task Group reviewed proposals for Revision C of IPC-7095, Design and Assembly Process Implementation for BGAs, and developed changes that had been identified in previous meetings. The first draft of Revision […]

IPC Standards Committees: Progress Reports for Board Design, Fabrication and Related Areas

Keep up with IPC standards committee activities with these status reports published in our recent Intouch Newsletter. For more information on a particular committee, visit our committee home pages , the IPC status of standardization or e-mail answers@ipc.org. Printed Board Design The 1-10C Test Coupon and Artwork Generation Task Group approved Appendix A to IPC-2221B, […]

Now Available: IPC-TM-650, Method 2.5.7.2, Dielectric Withstanding: Voltage (HiPot Method) – Thin Dielectric Layers for Printed Circuit Boards)

The dielectric withstanding voltage test (Hipot test) consists of the application of a voltage higher than the operating voltage for a specific time across the thickness of the test specimen’s dielectric layer. This is used to prove that a printed board can operate safely at its rated voltage and withstand momentary voltage spikes due to […]