Tag Archives: IPC/JEDEC-9706

Joint Team Trims Standard Development Cycle

Getting multiple groups to work together often extends the time it takes to finish a project. But when IPC and JEDEC teamed up to create a standard for grid array package testing, they shortened the typical standard development cycle. IPC/JEDEC-9706, Mechanical Shock In-situ Electrical Metrology Test Guidelines for FCBGA SMT Component Solder Crack and Pad […]