IPC Standards Committees: Progress Reports for Board Design, Fabrication and Related Areas

Keep up with IPC standards committee activities with these status reports published in our recent Intouch Newsletter. For more information on a particular committee, visit our committee home pages , the IPC status of standardization or e-mail answers@ipc.org.

Printed Board Design

The 1-10C Test Coupon and Artwork Generation Task Group approved Appendix A to IPC-2221B, Generic Standard on Printed Board Design. The appendix represents an “overhaul” of existing test coupon designs currently provided in section 12.4 of IPC-2221A. This work is being done in conjunction with the development of revision B to IPC-2221 which is expected to be completed in Q4 2011. The appendix includes a new A/B-R plated-through hole evaluation coupon design that has been approved as a replacement for the legacy A and B and A/B test coupon designs, as well as new designs for the “D” interconnect resistance coupon, the “E” insulation resistance coupon, the “S” plated-hole solderability test coupon, and a new “P” peel strength evaluation coupon.

Data Generation and Transfer

The 2-10 Data Generation and Transfer Committee and 2-16 Product Data Description (Laminar View) Subcommittees discussed revision A of IPC-2581, Generic Requirements for Printed Board Assembly Products Manufacturing Description Data and Transfer Methodology. The committee scheduled a meeting later in June to prepare the draft of Revision A for circulation.

Electronic Documentation Technology

The 2-40 Electronic Documentation Technology Committee discussed the relationship of the IPC-261X and IPC-258X series of documents. Committee member took the outline developed at the interim meeting in Phoenix and discussed how these concepts would be incorporated into the new IPC-2616 and IPC-2617. The committee also discussed the methodology for reliability and techniques for product testing to incorporate in IPC-2617.

Base Materials

The 3-11 Laminate/Prepreg Materials Subcommittee developed an Amendment 1 to IPC-4101C, Specification for Base Materials for Rigid and Multilayer Printed Boards. Primary proposed items for inclusion in the amendment are: a) Adding DMA thermal analysis testing for measurement of Tg; b) Inserting the property of fracture toughness of laminate resin as an optional test and c) Specification sheet rationalization (consolidation) to make the specification easier to use.

The 3-11G Corrosion of Metal Finishes Task Group established the major control parameters for test vehicles, chamber conditions and now, enough testers for running the mixed flowing gas (MFG) round robin test program to replicate the earlier creep corrosion testing run by Alcatel Lucent. The test program is expected to start soon.

The 3-12A Metallic Foil Task Group reviewed test results that were presented at the meeting in January. The group reviewed the correlation of copper foil roughness measurements made using optical profilometers at three separate locations, each using separate pieces of equipment.

The 3-12D Woven Glass Reinforcement Task Group discussed the 1 GHz permittivity (dielectric constant) data submitted from three E-glass manufacturers. A fourth manufacturer will be submitting data, so a requirement value of the 1 GHz permittivity for E-glass can be inserted into the IPC-4412A, Specification for Finished Fabric Woven from ‘‘E’’Glass for Printed Boards. The group also discussed bubble formation in bead strap E-glass that may lead to hollow glass filaments in woven E-glass fabric. Another glass manufacturer (St. Gobain) agreed to examine bead straps generated by Dielectric Solutions and AGY.

Fabrication Processes

The 4-14 Plating Processes Subcommittee worked on a draft of revision A of IPC-4554, Specification for Immersion Tin Plating for Printed Circuit Boards. Testing has shown that the use of Test Flux #1 per IPC J-STD-003B does not work correctly for immersion tin solderability evaluation via wetting balance testing instead, Test Flux #2 should be used for all solder alloys. The group also reviewed a draft of IPC-4556, Specification for Electroless Nickel/Electroless Palladium/Immersion Gold Plating for Printed Circuit Boards.

Flexible Circuits

The D-11 Flexible Circuits Design Subcommittee continued development of a tutorial appendix to  IPC-2223, Sectional Design Standard for Flexible Printed Boards. The goal of the tutorial is to provide guidance to the printed board designer. The main body of IPC-2223 will now contain only design requirements, making it much more readable and useable. This tutorial will be part of the C Revision to IPC-2223 scheduled for a Q4 2011 release. The subcommittee also updated section on bend area conductor considerations.

The D-12 Flexible Circuits Performance Subcommittee continued work on Revision C to IPC-6013, Qualification and Performance Specification for Flexible Printed Boards. The subcommittee is one of three actively working to update its respective specification with current HDI/microvia industry requirements as part of an overall effort to replace the outdated IPC-6016 specification for HDI/microvias. The subcommittee updated requirements for plating in microvias and established criteria for a microvia contact area.

The D-13 Flexible Circuits Base Materials Subcommittee pushed IPC-4204A, Flexible Metal-Clad Dielectrics for Use in Fabrication of Flexible Printed Circuitry to its final draft. The subcommittee noted at least six changes that needed to be incorporated in the draft copy. The subcommittee has routed the final draft for industry comment.

The D-15 Flexible Circuits Test Methods Subcommittee advanced the test method, TM 2.6.2, Moisture Absorption, Flexible Printed Wiring to its final draft of revision D. It will be submitted to the 7-11 Test Methods Subcommittee for consideration for insertion into TM-650, Test Methods Manual.  The group also addressed TM, Moisture and Insulation Resistance, Flexible Base Dielectric to push it to its C revision, but quickly realized that it needed a better understanding of a certain test. The group will look to the D-12 Subcommittee for assistance with this test method and how it is affected by IPC-6013, Qualification and Performance Specification for Flexible Printed Boards. Finally, the subcommittee began to examine the TM 2.1.13, Inspection for Inclusions and Voids in Flexible Printed Wiring Materials to revise it to its B revision.

High Speed/High Frequency

The D-23 High Speed/High Frequency Base Materials Subcommittee reviewed and approved a new template for new material specification (slash) sheets in the forthcoming IPC-4103A. The concept utilizes a “tight/loose” slash sheet approach that has “tight” mandatory requirements for some attributes (Dk, Df, description) and “loose” requirements for others (e.g. thermal conductivity, moisture absorption) that can be certified to or called out on the fabrication drawings. The subcommittee met in late May to prepare IPC-4103A for a final draft for circulation.

The D-24b Propagation Loss Test Methods Task Group considered an update to TM-650, Method, Test Methods to Determine the Amount of Signal Loss on Printed Boards, by replacing the existing root impulse energy (RIE) methodology with a lower cost loss methodology known as SET2DIL. The task group reviewed updates to the current round robin test program, validating the use of the methodology in Method

Rigid Printed Boards

The D-31B IPC-2221/2222 Task Group continued work on Revision B to IPC-2221, Generic Standard on Printed Board Design, updating section 12.4 on test coupon design, in conjunction with the work being done by the 1-10c Test Coupon and Artwork Generation Task Group. The current IPC-2221A has an outdated Figure 12-1 that gives an example of the location of test coupons on printed board panels. There was a discussion on how to update this illustration to properly give examples of coupon strips for both the existing coupon set as well as the new coupon set recently developed by the 1-10C Task Group.

Members of the D-33A Rigid Printed Board Performance Specifications and 7-31A Task Groups continued efforts for a future Revision D to IPC-6012, Qualification and Performance Specification for Rigid Printed Boards. The task group worked to develop criteria for material and copper fill of microvia structures, addressing the presence of voids or cavities in the hole fill, as well as dimple/bump requirements where the structures will be used as a land for attachment of surface mount devices. The task group also worked on redefining a microvia, incorporating the concept of aspect ratios and dimensions from target land to capture land. This work is being done in conjunction with the D-13 (IPC-6013) and D-22 (IPC-6018) subcommittees as an overall effort to update IPC-6010 performance specifications with HDI/microvia requirements.

The D-35 Board Storage and Handling Subcommittee reviewed survey feedback from document purchasers on how the new IPC-1601, Printed Board Handling and Storage Guidelines, is being used. This feedback will aid the subcommittee in drafting a scope for a future revision to IPC-1601, which will include more guidance on storage and handling at the printed board assembly level.

Embedded Devices

The D-54 Embedded Devices Test Methods Subcommittee worked on a new test method, TM 2.5.34, Power Density Rating for Embedded Resistors. The group has pushed the test method to the final draft stage. However, data needs to be generated using the test method at two or three separate locations with separate pieces of equipment so that a statistical gauge R&R analysis can show that the test is valid.

The D-55 Embedded Devices Process Implementation Subcommittee continued development of the draft of IPC-7092, Design and Assembly Process Implementation for Embedded Components. In reviewing the table of contents, the group took note of the various embedded product descriptions in the present draft. As a result, they reaffirmed the methodology which makes an attempt to simplify the number of different processes that could be used in building an embedded substrate package. These concepts will simplify the methodology that can be built into the document in order to describe the processing steps needed to build an embedded device product.

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